47McciBootloaderBoard_Catena1sj_Eeprom_t *
57 extern volatile uint8_t g_McciBootloaderBoard_Catena1sj_EepromBase[];
60 return (McciBootloaderBoard_Catena1sj_Eeprom_t *)
61 &g_McciBootloaderBoard_Catena1sj_EepromBase[0];
83 if (pEeprom->fUpdateRequest == dwValue)
static uint32_t McciArm_putRegOr(uint32_t reg, uint32_t orVal)
or 32-bit values to a cm0plus register
static uint32_t McciArm_getReg(uint32_t reg)
read a 32-bit value from a cm0plus register
static uint32_t McciArm_putReg(uint32_t reg, uint32_t val)
write a 32-bit value to a cm0plus register
McciBootloaderPlatform_SetUpdateFlagFn_t McciBootloaderBoard_Catena1sj_setUpdate
#define MCCI_BOOTLOADER_CATENA_1SJ_EEPROM_UPDATE_REQUEST
the distinguished "update request" value
#define MCCI_STM32L0_REG_FLASH_PECR
Flash program and erase control register.
#define MCCI_STM32L0_REG_FLASH_PEKEYR_UNLOCK2
unlock word 2 for PECR
#define MCCI_STM32L0_REG_FLASH_PEKEYR
Flash PECR unlock key register.
#define MCCI_STM32L0_REG_FLASH_SR
Flash status register.
#define MCCI_STM32L0_REG_FLASH_PEKEYR_UNLOCK1
unlock word 1 for PECR
#define MCCI_STM32L0_REG_FLASH_SR_BSY
Busy doing write/erase.
#define MCCI_STM32L0_REG_FLASH_PECR_PELOCK
Lock the FLASH_PECR register.
McciBootloaderBoard_Catena1sj_Eeprom_t * McciBootloaderBoard_Catena1sj_getEepromPointer()
bool McciBootloaderBoard_Catena1sj_getUpdate(void)